Rajeeb Hazra, General Manager of Intel Technical Computing Group holding “Knights Corner” – Intel® Many Core Architecture co-processor capable of delivering more than 1 TFLOPS of double precision performance.

HISTORY:
In 1997, ASCI Red at Sandia National Lab broke the teraflop barrier, using almost 10,000 Pentium chips to reach one trillion calculations per second. Total development cost was $55 million.

NEWS HIGHLIGHTS
Intel® Xeon® processor E5 family, world’s first server chip to support the PCI Express* 3.0 I/O integration, debuts on TOP500 list, powering 10 supercomputers.

Intel’s “Knights Corner” product, the first commercial co-processor based on the Intel® Many Integrated Core (Intel® MIC) architecture, was shown for the first time breaking the barrier of 1 TFLOPS double precision performance**.

Intel announced additional investments and new partner projects with R&D laboratories to pursue the goal of achieving Exascale performance by 2018.

Intel processors power 85 percent of all new entries to the latest TOP500 list of supercomputers, with Intel Xeon processor 5600 series being most popular selected for 223 systems.

READ MORE AT INTEL ON KNIGHTS CORNER>>>>>>

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